The Effects of Conductance on Metastable Switches in Memristive Devices Based on Anti-Hebbian and Hebbian (AHaH) Learning Rules

In the last few years, the literature conferred a great interest in studying the feasibility of using memristive devices for computing. Memristive devices are important in structure, dynamics, as well as functionalities of artificial neural networks (ANNs) because of their resemblance to biological learning in synapses and neurons regarding switching characteristics of their resistance. Memristive architecture consists of a number of metastable switches (MSSs). Although the literature covered a variety of memristive applications for general purpose computations, the effect of low or high conductance of each MSS was unclear. This paper focuses on finding a potential criterion to calculate the conductance of each MMS rather than the whole conductance as reported in the literature. Anti-Hebbian and Hebbian (AHaH) learning rules are used to mimic the changes in memristance of the memristors. This research will concentrate on the effect of conductance on an individual MSS to simulate the nanotechnology devices of the memristors. A single synapse is presented by a couple of memristors to mimic its resistance switching. The learning circuit of artificial synapses could be used in many applications, such as image processing and neural networks, for pattern classification of synapses, represented by a map of the memeristors. These synapses are essential elements for data processing and information storage in both real and artificial neural systems.


Introduction
Recently, memristor based applications have been developed rapidly through research in computation and human brain emulation, which is simulated as synapse in artificial neural networks. The artificial synapse needs to recall its previous history. In conjunction with presynaptic and post-synaptic neurons, memory-resistor characteristics, which is a main behaviour in the memristors, can do that in an efficient method, realizing all the synaptic properties needed. In reality, the term memristor is an abbreviation of "memory" and "resistor". It is an electrical device combining the behaviours of both resister and memory. The resistance of the memristor is not constant but depends on the number of electrical charges that flow through it, which can determine the amount of the current flowing in the memristor. The relation between voltage (v) across the memristor and current (i) flowing through it at any time (t) can be expressed by the following Ohm's law: ( ) = ( ( )) ( ) (1) where is the charge-dependent resistance or memristance (in Ohms) at time t. At any given time, the integral time of the current through the memristor determines the value of incremental memristance, as follows [1,2]: The relation between voltage and current is shown in Figure 1. The simulation of this circuit element is of much interest in the field of computation and synapse representation in real and artificial neural systems. For example, arithmetic operations can be implemented based on memristance rather than on the circuit based on voltage or current. This is important in hardware implementation for synapse simulation [3]. The simulation of memristive nano-devices as synapses has an important role in both computation and information storage [4]. In this case, the memristor can provide the same features of a synapse depending on the learning rule. This paper shows the effect of conductance on each MSS to find the whole conductance of the memristive. AHaH learning rule could be used to change the memristance of the memristor, then enabling the synapse to update its weights depending upon the occurrence of spikes between the input and output. The rest of the paper is structured as follows. In Section 2, we describe the required background and the relevant work. The generation of the memristive model and simulation are described in Sections 3 and 4. We introduce our results in Section 5. The conclusions are drawn in Section 6.

Related works
Several emerging technologies have been suggested to build hardware-based ANNs, such as memristive devices, phase change memories (PCMs) [5], and magnetic random access memories (MRAMs) [6]. Memristor-based artificial neurons have recently been created, but with restricted interaction within an interconnected network with artificial synapses. The resistance of memristor is not fixed, but changes depending on the amount and the direction of the charges flowing through it [1]. When the power goes out, the resistance will remain the same; therefore, it is non-volatile memory. It is well known in electronics that there exist only three fundamental passive circuit elements: the resistor, capacitor, and inductor. However, more than 50 years ago, a fourth fundamental circuit element, the memristor, was discovered [2]. In the earliest concept for the memristor proposed in 1971, Chua predicted that the memristor would be a two-terminal electrical device that represents the missing circuit element [2]. This device provided a relationship between flux and charge, but this study was only theoretical [2,7]. In 2008, the memristor was highlighted by Hewlett-Packard (HP) Labs when a group of scientists realized the first memristor electrical device, which was a nano-size device based on TiO 2 [8], following the theory which was predicated in 1971 by Chua. In the same year, HP combined the memristive with CMOS neurons to produce neuromorphic circuits [9][10]. In this study, they overlapped the Spike Time Dependent Plasticity learning law, which is an updated biological synaptic rule, with memristance. Since then, memristors have witnessed dramatic developments and research interest. In 2009, a nonlinear memristive grid, rather than nonlinear resistive grids, was used for edge smoothing in two-dimensional image processing. The result showed that the memristive grid was more efficient than the resistive grid in noise elimination and edge precision [11]. In addition, it was efficient in neuromorphic computing [12]. The next stage in research development was to simulate the biological synaptic process. Two, rather than one, memristors are required, connected serially with different polarities and can do arithmetic operations based on analogy circuit, rather than voltage based circuit [3][4]. In 2014, Nugent and Timothy [13] introduced a general memristive device model based on AHaH learning rules, where synaptic weights are represented using two memristors connected serially with the same polarities. These memristors are needed to simulate AHaH circuit nodes. There are many memristive device models which model specific devices, but this type of memristor modelled a large number of devices [13][14]. Modelling memristive devices is believed to be very helpful for general purpose computing and machine learning applications, such as image processing, neural networks, communication systems, and neuromorphic-in-memory applications [15][16][17][18][19][20][21]. In this research, we will concentrate on simulated models of memristive devices, rather than physical devices, in terms of the effect of conductance of MSS on the performance of the synaptic weights. This simulation improves the efficiency of learning process in terms of time and space.

Memristive model generation
Memristive neuromorphic device is a successful candidate for the development of artificial brain. The memristive model is needed for simulating AHaH node circuits [13]. The memristor consists of a number of MSSs (N), some are in the high conductance state ( ) and the remaining are in the low-conductance state ( = − ). All these parameters must be determined to find the model. In addition, the conductance for each MSS must be determined in both cases; in other words, determination of the conductance of the switch in state A and state B. The conductance ( ) of the memristor for all MSSs is computed from the following equation: where is computed depending on N and , = × , where the initial value for the resistance is , a random value between 0 and 1 represents the lowest and the highest resistance, respectively. Therefore, = (1 − ) × .

Simulation of single memristor and synapse creation
In this study, memristor devices could be created from the materials of either chalcogenides or metal-oxides. These devices have a common architecture, with the following parameters: the sinusoidal voltage is used as the input voltage source with a frequency of 200 Hz and the number of MSSs is set to 2000000. In the first step, all these channels are in state A (low conductance).

Postsynaptic neuron
Presynaptic neuron I Figure 2-Two memristors to represent synapse. The voltage divider is used to compute output voltage at y between v and -v [13].
Clearly, to simulate biological synapses, two memristors are needed [3][4] which are connected serially with the same polarities. Thus, both memristors compete to dissipate pathways to achieve AHaH rule, as in Figure 2. A voltage divider produces output y between v and -v. This model can be applied to different memristive devices of various materials, such as chalcogenides, metal-oxides, AIST and GST. Both memristors used sinusoidal voltage as the input and the same parameters used in the single memristors, except that the time scale is different in order to observe the dynamical states of each memristor separately. When the input voltages are applied, the memristance of both devices is increased or decreased to set the initial weights of the synapses. Then, the output of the voltage divider is computed from the following equation: Thus, the map weights of a particular perceptron network could be described by assigning each weight to a single memristor circuit, as shown in figure 3. A set of synapse weighting map (W1, W2, …. Wk) are arranged to transfer active signals from the inputs (1,2,….k) of the presynaptic neuron to the following (postsynaptic) neuron via the output. The value of the output is compared with a threshold, according to equation 6, to find whether its value is higher (or lower), and then determine the accumulated value for firing the postsynaptic neuron through sending an output spike.

Observational studies
In order to create AHaH node, an array of synapses is required, with the input being represented as spike and bias which refer to the driven voltage source to and analog output y, while driven voltage source F refers to feedback. This node implements AHaH plasticity with circuit simulation. The mechanism of the AHaH learning rule for circuit simulations is achieved by several steps. First, the material used for the memristor is determined, such as Ag-chalcogenide, AIST, GST, or WOx, because the update in conductance is different from one material to another. Then, the conductance is computed from equation (3) for both devices of the memristors (A and B) after the input data is converted into a spike. The weight for each synapse is computed from the following equation: is the conductance for memristor A and is the conductance for memristor B. The input voltages ( = 0.5V and = -0.5V) are set for the M a and the M b , respectively. Then, two processes are applied to update conductance, namely the read and write cycles. Through the read part, Kirchho's Current Law (KCL) is used to produce the output voltage across the y, where -v and +v are set to the input spike for M a and M b , respectively.
where M is the number of active spikes input only with bias. Both M a and M b are competed to dissipate the energy pathway. The adaption in synaptic weight is implemented through the read and write cycles, depending on the Anti-Hebbian and Hebbian learning. In the read cycle, it is important to point out that with the access to the synapse, the output ( ) is read, but at the same time, adaption is happening (merging memory and processing), that is, the conductance is increased through Anti-Hebbian learning in the read phase. The difference between the driven voltage source for M a ( ) and the output voltage y is the amount of the voltage applied across the switch to change its state. This represents the conductance adaption in M a . If the accedes the height of barrier potential (the threshold value of the switch), then the switch changes its state and the active weights update their amount via generating a spike for firing the output neuron. In the same way, the conductance of the M b is updated by the difference between y and to govern the neuronal firing events. In both the above cases, the conductivity of the active input memristor is increased, while the conductivity of the bias memristor is decreased by Anti-Hebbian learning. This process will update the conductance of the synapses that have firing events, while the synapses that have no firing events will decrease. In the writing process, depending on the driven voltage source and the output voltage, either the conductance of M a or the conductance of M b will update. M a is rewarded in any of the following cases: 1. If feedback (F) is supervised with value 1. 2. If y is positive and F is unsupervised with value 0. In the above two cases, M b is the loser; therefore, it will decay by updating its conductance for active input and bias. The voltage applied across the switch is − through the conductance adaption for the active input and reverse polarities, while it is (−( − )) for As a result, this process is a counteraction to the reading process, because in the writing process the conductance is decreasing and in the reading process the conductance is increasing, as illustrated in Tables (1, 2). This counteraction is important to avoid the conductance reaching a saturated state. The most important advantage of the function simulation is that it has less computation than the circuit simulation, while both converge in the simulation results.

V. Conclusions
In this work, we describe a memristive device for general purpose computing and machine learning through the implementation of neuromorphic learning rules based on memristive nano-devices. The memristor works with changing resistance depending on the current flowing through it. In addition, this work shows how synapse weights can be built from two memristors. An array of these synapses is used to build AHaH node, which could be used for machine learning applications with minimal computational overheads and cost. There are different applications of machine learning; for example, supervised and unsupervised classification and clustering based on a memristive nano-device, which has important characteristics in storage and computations.